A new technical paper titled “Generative AI for Analog Integrated Circuit Design: Methodologies and Applications” was published by researchers at McMaster University. Abstract “Electronic Design ...

A new technical paper titled “The 2D Materials Roadmap” was published by researchers at many institutions including Chinese ...

A new technical paper titled “Learning Cache Coherence Traffic for NoC Routing Design” was published by researchers at Nanyang Technological University. “In this work, we propose a cache ...

Hardware IP Protection through Low-Overhead Fine-Grain Redaction” was published by researchers at University of Florida.

Controlling thin films to precise specifications is essential for ensuring high yield in high-performance devices.

Incorporate testability-related structures such as core wrapper cells, x-bounding logic, and test points directly into the RTL.

A short description of process control is an accurate one—It’s a means of controlling manufacturing equipment and reducing ...

Xtreme Pooling allows any test processor on a Pin Scale 5000 card to store vector data in other test processors’ ...

A novel universal deep learning model for segmentation of automated optical inspection images for both PCBA and semiconductor ...

Detecting macro-defects on wafers and tracing them to their root cause is getting easier due to tool improvements and traceability advancements.

A new technical paper titled “A progressive wafer scale approach for Sub-10 nm nanogap structures” was published by ...

At GTC 2025, Nvidia CEO Jensen Huang projected $1 trillion in global data center CapEx by 2028. At this pace, data center ...