EDN

Tabula tips time-share FPGA architecture

LONDON — Fabless FPGA startup Tabula Inc. has announced the architecture of its 3-D programmable logic devices (3PLD), which it is calling Spacetime, because it uses the temporal domain as third ...
EDN

How to design an FPGA architecture tailored for efficiency and performance

Until relatively recently, the majority of FPGA architectures were developed using 4-input lookup tables (LUTs), where each LUT is constructed from SRAM bits storing digital (0 or 1) information. Also ...
Semiconductor Engineering

Manycore-FPGA Architecture Employing Novel Duet Adapters To Integrate eFPGAs in a Scalable, Non-Intrusive, Cache-Coherent Manner (Princeton)

A technical paper titled “Duet: Creating Harmony between Processors and Embedded FPGAs” was written by researchers at Princeton University. “The demise of Moore’s Law has led to the rise of hardware ...
The Next Platform

Xilinx Unveils xDNN FPGA Architecture for AI Inference

FPGAs might not have carved out a niche in the deep learning training space the way some might have expected but the low power, high frequency needs of AI inference fit the curve of reprogrammable ...
Design-Reuse

Xilinx Unveils Revolutionary FPGA Architecture, Enables Next-Generation Platform FPGAs

SAN JOSE, Calif., December 8, 2003 - Xilinx, Inc. (NASDAQ:XLNX), the world's leading supplier of programmable logic solutions and inventor of the FPGA, today unveiled a revolutionary new architecture ...
Electronic Design

Modular FPGA Architecture Spawns Multiple Silicon Optimizations

Though FPGA designers have tried to keep FPGAs as generic as possible, Xilinx feels it's time to craft FPGAs that are more in tune to specific market segments. To do this, its next-generation Virtex ...
New Electronics

Altera lifts the lid on the Hyperflex FPGA architecture

Two years after announcing Stratix 10 SoC FPGAs, Altera has disclosed more details about how the devices – being built on Intel's 14nm TriGate process – achieve the claimed performance. Two years ...
Design-Reuse

Industry's First RISC-V SoC FPGA Architecture Brings Real-Time to Linux, Giving Developers the Freedom to Innovate in Low-Power, Secure and Reliable Designs

Demonstrations at RISC-V Summit Dec. 4-5 to Show Size, Power and Performance Benefits of Integrating PolarFire SoC's Hard CPU Subsystem with Programmable Logic SANTA CLARA, Calif., Dec. 4, 2018 -- ...
Electronics Weekly

FPGA fabrics meet CPU architectures

Performance and integration challenges could lead to engineers re-examining the role of the ‘humble FPGA’, says Alok Sanghavi of Achronix Semiconductor. Physical limitations are starting to restrict ...
Semiconductor Engineering

FPGAs Drive Deeper Into Cars

FPGAs are reaching deeper and wider inside of automobiles, playing an increasingly important role across more systems within a vehicle as the electronic content continues to grow. The role of FPGAs in ...