1. Multiple interface possibilities exist for connecting an ADC to an FPGA. In double-data-rate (DDR) CMOS, the transmitter transitions data on every clock edge.

The reference design uses about 5% of the FPGA logic to transfer the ADC codes on the serial source synchronous bus to its embedded block RAM memory. Pricing and Availability The interface card, ...

500 MSPS/14 bit Xilinx Kintex-7 FPGA-based XMC card provides system integrators with high-performance analog I/O module.